Printed circuit board and manufacturing method thereof

ABSTRACT

A printed circuit board and a manufacturing method of the same are disclosed. The method includes: preparing a carrier including a primer resin layer formed thereon; forming a circuit pattern on the primer resin layer; stacking the carrier onto an insulating layer such that the circuit pattern is buried in the insulating layer; removing the carrier; forming a via hole in the insulating layer on which the primer resin layer is stacked; and forming a conductive via in the via hole. The conductive via is formed by forming a plating layer in the via hole and on the primer resin layer and removing a portion of the plating layer formed over the primer resin layer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of Korean Patent Application No.10-2009-0099217, filed with the Korean Intellectual Property Office onOct. 19, 2009, the disclosure of which is incorporated herein byreference in its entirety.

BACKGROUND

1. Technical Field

The present invention relates to a printed circuit board and amanufacturing method thereof.

2. Description of the Related Art

With the recent trend for a high density multi-functional package boardhaving an electro-device, there has been an increasing demand for highdensity circuit patterns that are formed on a substrate.

According to the related art, circuit patterns are formed on the surfaceof an insulating layer. However, since the structure is not suitable forhigh density circuit patterns, a technique of burying circuit patternsin the insulating layer has been introduced. According to the technique,a carrier is prepared, and a circuit pattern is formed over the carrier.And then, the circuit pattern is transferred to an insulating resin.

Here, since a metal barrier is interposed between the carrier and thecircuit pattern, there is a limit to simplification of manufacturingprocesses because the metal barrier has to be etched while the circuitpattern is transferred to the insulating resin. In addition, when a holeis processed in the insulating resin in order to form a via forinterlayer connection, a portion of the metal barrier has to be opened,before the hole is processed. In that case, an interlayer accuracy maybe deteriorated due to the process of opening a portion of the metalbarrier.

SUMMARY

An aspect of the present invention provides a method of manufacturing aprinted circuit board, which can include: preparing a carrier includinga primer resin layer formed thereon; forming a circuit pattern on theprimer resin layer; stacking the carrier onto an insulating layer suchthat the circuit pattern is buried in the insulating layer; removing thecarrier; forming a via hole in the insulating layer on which the primerresin layer is stacked; and forming a conductive via in the via hole.The conductive via can be formed by forming a plating layer in the viahole and on the primer resin layer and removing a portion of the platinglayer formed over the primer resin layer.

The carrier can be made of metal, and the via hole can be a blind viahole (BVH).

The via hole can be formed by performing a laser processing from adirection of the primer resin layer.

Another aspect of the present invention provides a printed circuitboard. The printed circuit board can include: an insulating layerincluding circuit patterns buried in both sides of the insulating layer;a via electrically connecting the both sides of the insulating layer; aprimer resin layer stacked over one side of the insulating layer; and asolder-resist layer covering the primer resin layer.

The via hole can be a blind via hole (BVH).

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a flowchart illustrating a method of manufacturing a printedcircuit board according to an embodiment of the invention.

FIGS. 2 to 14 illustrate processes for a method of manufacturing aprinted circuit board according to an embodiment of the invention.

FIG. 15 illustrates a process that two carriers are compressed on upperand lower sides of the insulating layer, respectively.

DETAILED DESCRIPTION

As the invention allows for various changes and numerous embodiments,particular embodiments will be illustrated in the drawings and describedin detail in the written description. However, this is not intended tolimit the present invention to particular modes of practice, and it isto be appreciated that all changes, equivalents, and substitutes that donot depart from the spirit and technical scope of the present inventionare encompassed in the present invention. In the description of thepresent invention, certain detailed description of related art isomitted when it is deemed that it may unnecessarily obscure the essenceof the invention.

A printed circuit board and a manufacturing method thereof according tocertain embodiments of the present invention will be described below inmore detail with reference to the accompanying drawings. Thosecomponents that are the same or are in correspondence are rendered thesame reference numeral regardless of the figure number, and redundantdescriptions are omitted.

FIG. 1 is a flowchart illustrating a method of manufacturing a printedcircuit board according to an embodiment of the invention, and FIGS. 2to 14 illustrate processes for a method of manufacturing a printedcircuit board according to an embodiment of the invention. Illustratedin FIGS. 2 to 14 are a supporting member 10, a carrier 20, a primerresin layer 30, a metal foil 40, a plating resist 42, circuit patterns44, 62, an insulating layer 50, a via hole 52, plated metal 56, aconductive via 58 and an inner substrate 60.

First, a carrier 20 including a primer resin layer 30 is prepared(S110), and a circuit pattern 44 is formed on the primer resin layer 30(S120). For that, as shown in FIG. 2, a structure includes, in thesuccessive order of, carriers 20, primer resin layers 30 and metal foils40 on both sides of a supporting member 10. Here, the supporting member10 may be made of, for example, a thermoplastic material whose adhesioncan be reduced when the supporting member 10 is heated. The carriers 20stacked on both sides of the supporting member 10 are to be separatedfrom the supporting member 10 later. The metal foil 40 may be made ofcopper or other conductive metal.

Next, as shown in FIG. 3, a patterned plating resist 42 is formed overthe metal foil 40, and a circuit pattern 44 is formed by anelectro-plating process. Here, since the metal foil 40 formed over theprimer resin layer 30 can serve as a seed layer, the electro-platingprocess for forming the circuit pattern 44 can be carried out. Then theplating resist 42 is removed, and a circuit pattern 44 is formed on themetal foil 40 such that the circuit pattern 44 has a protruding shape.

Next, as shown in FIG. 5, the carriers 20 stacked on the supportingmember 10 are separated from the supporting member 10. Before that, asurface-treatment process may be carried out on the circuit pattern 44such that enough adhesion between the circuit pattern 44 and theinsulating layer 50 can be ensured. When the surface-treatment processis carried out by flash etching etc., a roughness may be formed on thesurface of the circuit pattern 44 and the adhesion between the circuitpattern 44 and the insulating layer 50 can be increased. During thisprocess, the exposed portions of the metal foil 40 on the primer resinlayer 30 may be removed.

Then, as shown in FIGS. 6 and 7, the carrier 20 is stacked onto aninsulating layer 50 and the circuit pattern 44 is buried in theinsulating layer 50 (S130). Since the primer resin layer 30 and circuitpattern 44 are formed on the surface of the carrier 20, the circuitpattern 44 can be buried in the insulating layer 50 when the carrier 20is stacked on the insulating layer 50. Here, the insulating layer 50 maybe in B-stage, that is, semi-hardened. In that case, the circuit pattern44 may be buried in the insulating layer 50 easily. And then, the solidbonding strength between the circuit pattern 44 and the insulating layer50 may be obtained when the insulating layer 50 is hardened.

Meanwhile, as shown in FIG. 6, an inner substrate 62 may be stacked onthe lower surface of the insulating layer 50. A circuit pattern 62 maybe formed on the surface of the inner substrate 62, and buried in theinsulating layer 50 by stacking each other.

When a 2-layers substrate is needed, two carriers 20 separated from thesupporting member 10 may be compressed on upper and lower sides of theinsulating layer 50, respectively, as shown in FIG. 15. In that case,circuit patterns 44 may be buried in both sides of the insulating layer50 at the same time in one process.

Next, as shown in FIG. 8, the carrier 20 is removed (S140). When thecarrier 20 is made of metal, the carrier 20 may be removed by awet-etching process with etchant. In that case, since the upper surfaceof the circuit pattern 44 buried in the insulating layer 50 is coveredby the primer resin layer 30, the circuit pattern 44 may not be damagedby the etchant used for removing the carrier 20.

Next, as shown in FIG. 9, a via hole 52 is processed (S150). A laser maybe used for processing the via hole 52. In this embodiment, since thecircuit pattern 44 is covered by the primer resin layer 30, the via hole52 may be processed directly without processing a window. Also, when alower side of the via hole 52 is covered by a circuit pattern 62 formedon the inner substrate 60, that is, the via hole 52 is a blind via hole(BVH), a depth of the via bole 52 may be controlled easily.

Next, a via 85 for interlayer connection is formed in the via hole 52(S160). A brief description is set forth below.

First, as shown in FIG. 10, a seed layer 54 is formed on the primerresin layer 30 and inner wall of the via hole 52. For that, anelectroless plating process may be carried out.

Then, plated metal 52 is filled in the via hole 52 by an electro-platingprocess, as shown in FIG. 11. The plated metal 52 filled in the via hole52 can serve as a conductive via 58 for interlayer connection. Theplated metal 52 may be copper (Cu) or whatever is suitable fortransmitting electric signals.

Next, as shown in FIG. 12, a portion of the plated metal 52 formed overthe primer resin layer 30 is removed. For that, a wet-etching processwith an etchant may be carried out. In that case, the primer resin layer30 formed on the surface of the insulating layer 50 can serve as anetch-stop barrier.

And, as shown in FIG. 13, a solder resist layer 70 is formed bydispensing solder resist ink while the primer resin layer 30 remains.

A printed circuit board manufactured by the processes set forth above isillustrated in FIG. 14. With reference to FIG. 14, a printed circuitboard according to this embodiment includes: an insulating layer 50,circuit patterns buried in both sides of the insulating layer 50; aconductive via 58 electrically connecting the both sides of theinsulating layer 50; a primer resin layer 30 stacked over one side ofthe insulating layer 50; and a solder-resist layer covering the primerresin layer 30.

While the spirit of the present invention has been described in detailwith reference to particular embodiments, the embodiments are forillustrative purposes only and shall not limit the present invention. Itis to be appreciated that those skilled in the art can change or modifythe embodiments without departing from the scope and spirit of thepresent invention.

As such, many embodiments other than those set forth above can be foundin the appended claims.

1. A method of manufacturing a printed circuit board, the methodcomprising: preparing a carrier including a primer resin layer formedthereon; forming a circuit pattern on the primer resin layer; stackingthe carrier onto an insulating layer such that the circuit pattern isburied in the insulating layer; removing the carrier; forming a via holein the insulating layer, the primer resin layer being stacked on theinsulating layer; and forming a conductive via in the via hole byforming a plating layer in the via hole and on the primer resin layerand removing a portion of the plating layer formed over the primer resinlayer.
 2. The method of claim 1, wherein the carrier is made of metal.3. The method of claim 1, wherein the forming of a via hole comprisesperforming a laser processing from a direction of the primer resinlayer.
 4. The method of claim 3, wherein the via hole is a blind viahole (BVH). 5-6. (canceled)